Characterization of a self-aligned RTP titanium disilicide MOS
A self-aligned titanium disilicide MOS process was investigated. Sputter deposited titanium films on silicon and silicon dioxide were heated in a Heatpulse rapid ...
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Formation of titanium disilicide during rapid thermal annealing
Introduction Titanium disilicide is a well known compound for metallization and ... ratio has been controlled by the ratio of the deposition rates of silicon and titanium. ..... Characterization of a self-aligned RTP titanium disilicide MOS process: ...
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Study on titanium salicide process for thin-film SOI devices
In this work, the titanium SALICIDE (Self-Aligned siLICIDE) process has been ... To fabricate TFSOI microwave MOSFETs with a CMOS-compatible process, one of the ... First RTP step Titanium starts to react with silicon to form silicide at about 500. .... Device fabrication and characterization Microwave TFSOI MOSFETs are ...
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An improved self aligned silicide process for VLSI - ScienceDirect.com
The titanium disilicide and cobalt disilicide were used as the silicides at the S, ... [ 3] follows the conventional NMOS process up to the point ofpolysilicon etching. .... Spike anneal: RTP processing at reduced thermal budget with applications to ... Preparation, characterization and charge transfer studies of nickel – modified ...
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Electronics Research Laboratory - University of California, Berkeley
Apr 15, 2005 ... 0.35 µm CMOS PROCESS ON SIX-INCH WAFERS ... Process development and characterization. 6 .... separately the poly-silicon gate material of p-channel and n -channel devices; it also includes ... Self-aligned titanium silicide (TiSi2) was formed on source, drain and gate areas to ..... Heatpulse 3 (RTP).
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Thesis PDF - EECS at UC Berkeley - University of California, Berkeley
Advanced Source/Drain Technologies for Nanoscale CMOS by ... difficult to attain low values of SBH for metal (silicide) contact to n-type silicon. This ... The process integration of high-κ/metal-gate stacks with .... Device Characterization. ...... Anderson, T.-J. King, J. Bokor, and C. Hu, "FinFET- A Self-aligned Double-Gate.
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Development of a Deep-Submicron CMOS Process for Fabrication
May 19, 2006 ... strained silicon, metal gates, high-k gate dielectrics, and replacement gate ... Unit Process Development & Integration. ○ Electrical Results ..... Figure 24: RTP Temperature Profile ... Self Aligned Titanium Silicide (TiSi. 2. ) ... o Back End CMP , Via and Metal 2 processes still need characterization. Figure 27: ...
[ MAquilinoThesis.pdf - Read/Download File
Development of nickel silicide for integrated circuit technology
The complementary metal oxide semiconductor (CMOS) technology has ... Self- aligned silicide process was developed in mid eighties that allowed ... Many silicides have been extensively studied and Titanium silicide (TiSi2) and Cobalt .... 2nd RTP. 60. 5.1. Reference AFM of doped polysilicon, nickel on doped polysilicon,.
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Improvement of Thermal Stability of Nickel Silicide Using Co - JSTS
Jun 3, 2013 ... Using Co-sputtering of Ni and Ti for Nano-Scale CMOS. Technology. Meng Li ... between the one-step rapid thermal process (RTP) ... Index Terms—Nickel silicide, titanium, co-sputtering, ... and CoSi2 have been widely used for the salicide (self- aligned silicide) process, they have several limits such as.
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Transport properties and functional devices on CVD grown Silicon
Jan 30, 2014 ... 1.3.1 Self aligned silicide . ... 1.3.4 Control of the silicidation process . ... 2.2 Undoped Silicon nanowires: impact of the silicidation on the electrical ... 3.4.1 Electrical characterization: tunnel devices and Random Telegraph .... straightforward choice because they are fully compatible with CMOS technology.
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(2005) L1389-L1391 - CIBA - National University of Singapore
Silicon Nano Device Laboratory, Department of Electrical and Computer Engineering, National University of ... physical characterization methods. ... Self- aligned silicide is essential in current deep-sub ... resistivity titanium germanide ( >800 C) and cobalt germa- ... Following that, nickel germanide was formed by RTP at.
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View/Open - Lirias
normally suppresses the silicidation process, while PAI ... RTP study of NoPAI and PAI1 on Si:P-3E20 (Fig.13) and ...  E. Rosseel et al., "Characterization of epitaxial Si: C: P and Si: P layers ... titanium silicide. ...  P. Liu, T. C. Hsiao, and J. Woo, "A low thermal budget self-aligned Ti ... in transition metal-silicon systems .
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Dotfets Mosfets Strained By A Single Sige Dot In A Low Temperature
Keywords: CMOS, MISFETs, strained silicon, silicon-germanium dots, excimer laser annealing ... 2 Excimer laser annealing for self-aligned n+p junctions. 49 ... 4.3 Electrical test device characterization. 110 ... 5.1.4 Titanium nitride/aluminium metal-gate ... early in the process so that the thermal budget of the standard CMOS.
[ PhD_Thesis_Cleber_Biasotto.pdf - Read/Download File
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and R. Verhaanentitled “Characterization and implementa.  Filed: Apr. 8, 1993 tion of self-aligned TiSi2 in submicrometer CMOS Tech.  Int. c1.6 . ... facial oxide on titanium silicide formation by rapid thermal silicon substrate by plasma ... RTP IN N2 on NH3 .... In this process a metal ?lm is deposited on a silicon wafer.
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Cener for advanced electronic materials processing - Repository
process has been designated as remote plasma-enhanced. CVD, or simply remote PECVD il). This focus ... wafer processing is rapid thermal processing ( RTP).
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Metal Gate Technology for Advanced CMOS Devices - DiVA
Keywords: metal gate, highYk dielectrics, titanium nitride, zirconium nitride, MoSFET, ..... gates on silicon-based devices and to a lesser extent with the introduction of .... oxide thickness (Intel's 65 nm CMOS process dictates a thickness (Tox) of ... the source and drain regions – the self-aligned approach. ..... RTP 600 °C + 2.
[ FULLTEXT01.pdf - Read/Download File
Dec 15, 2004 ... Applications of metallic borides for gate electrodes in CMOS integrated circuits. Corresponding author: W. ... For material characterization, we ... diffraction, which depends on thermal budget of RTP. ... polysilicon gates in a self aligned process. Nitrides, ..... on the other hand, such as boron rich or titanium.
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Lien vers pdf généré
diffusion processes ... MOS. 2/9. 14:30 - 16:10. OISANS ROOM. Molecules at surfaces - 2/9. Chair ... Self-assembling and chemistry of ferrocene dicarboxylic acid on different .... Silicene and few-layer silicon films on metal surfaces .... Infrared spectroscopy and ellipsometry caracteriation of sol gel dioxide titanium thin films.
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Methodology for Electrical Characterization of MOS - tuprints
Jan 19, 2004 ... Semiconductor (CMOS) devices is driving SiO2 based gate dielectrics to its phys- ical limits as stated in ..... RTP. Rapid Thermal Processing. SiON. Silicon Oxynitride. SiO2. Silicon Dioxide ... Titanium. TiN. Titanium Nitride. TiSi2. Titanium Silicide. VLSI. Very Large .... 3.3 Conventional self aligned process .
[ Thesis_AK_part_1.pdf - Read/Download File
1 Sanjay Banerjee is the Cockrell Family Regents Chair Professor of
Texas Instruments Incorporated from 1983-1987, he worked on polysilicon ... He is active in the areas of beyond-CMOS nanoelectronic transistors based ... NSF Workshop Co-Organizer for “Front and Back-end Processes”, Austin, TX 1999 ...... J.Lin, S.Banerjee, J.Lee and C.Teng, “Anomalous Leakage in Titanium Silicided.
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